As design/verification engineers, we have to create or deal with a lot technologies, languages, concepts, tools and documentation. This is my attempts for list of topics we need to know about

DE Link to heading

  • Sequential/comb logic
  • Counters and clock dividers
  • FSM
  • FIFOs
  • Valid/ready (skid buffers)
  • Arbiters
  • Pipelining

DV Link to heading

  • VHDL/Verilog/Systeverilog
  • UVM
  • SystemC
  • C++
  • Python
  • TCL/Makefile
  • UPF
  • IPXACT
  • SVA
  • Formal (VC Formal, Jasper)

FPGA Link to heading

  • Constraints
  • STA
  • CDC
  • Reset
  • Optimization (power, area, latency)

Technologies Link to heading

  • Computer Architecture
  • Protocols (PCIE, Ethernet, AXI, etc)

[1] http://www.sunburst-design.com/papers/ [2] https://zipcpu.com [3] https://thedatabus.in/